Thông báo: SYNOPSYS tuyển thực tập sinh AMS Circuit Design/Layout/ Digital
31/03/2021 09:53
Position: AMS Circuit Design/Layout/ Digital Intern
JD: https://bit.ly/3sBzr6o
Timeline: 12 Jul – 11 Jan
Contact: Submit CV and Transcripts via link or email (nguyen.bui@synopsys.com)
- Opportunities
- Monthly salary and allowances
- Have a great opportunity for jobs
- Experience real working environment and enjoy team activities.
- Be trained for fundamental knowledge of IC design, Analog Mixed signal design in both digital, analog and applications.
- Support capstone: be provided interesting topics and guided by dedicated engineers.
- Core Responsibilities
Stage 1:
- All Interns spend time training sessions related to jobs and join in Technical workshops
- In the ending of training sessions, Interns will join Evaluation tests, then be advised about suitable jobs for the next stage (Layout, Circuit or Digital)
Stage 2:
- Group into small groups, belonging to different teams in Mixed Signal IP department of SNPS (Layout, Circuit and Digital)
- Capstone topics will be assigned to teams. The training program, in this stage, will be close to real projects: Task planning, weekly status reports, design gate reviews, evaluation…
- Excellent interns will be promoted to official employees.
- Skills Requirements:
- Final year students of Electronics Engineering, Electromechanics, Telecommunications, Automation.
- GPA > 3/4 or 7.0/10 is a plus (Latest updated)
- Basic knowledge of circuit/layout/verilog coding